DRC 2013

Aftab's paper at Device Research Conference (DRC) 2013


​PhD student Aftab's MS thesis work on "Exploring SiSn as channel material for LSTP device applications" has been accepted to Device Research Conference (DRC) 2013. DRC is a historical conference and inarguably the third major conference for the electron device community. This paper is the first ever display of potential opportunity that lies with a very simple low-cost method to use silicon's unlikely ally tin (Sn) - a group IV material. In the recent past leading authorities like Prof. Krishna Saraswat (Stanford University) and Prof. YC Yeo (NUS) have spearheaded the study of GeSn using MBE and/or MOCVD processes. Specification of the paper is here:


Exploring SiSn as channel material for LSTP device applications
Aftab M. Hussain, Hossain M. Fahad, Nirpendra Singh, Kelly R. Rader, Galo A. Torres Sevilla, Udo Schwingenschlögl and Muhammad M. Hussain
Integrated Nanotechnology Lab, King Abdullah University of Science and Technology, Thuwal, Saudi Arabia
Email: Aftab.hussain@kaust.edu.sa or MuhammadMustafa.Hussain@kaust.edu.sa, Phone: +966-544-700-072
We present a novel semiconducting alloy, Silicon-tin (SiSn), as a channel material for LSTP device applications. The diffusion of Sn into silicon has been explored to demonstrate, for the first time, a MOSFET using SiSn as channel material. The semiconducting alloy SiSn offers interesting possibilities in the realm of silicon bandgap tuning and strain engineering. Previous works have shown that Sn diffuses into silicon wafer [[1]], and that the SiSn alloy is semiconducting [2]. Further, recent studies have shown better MOSFET performance with GeSn as channel material, as compared to Ge [3, 4]. To complement these activities, we have explored diffusion of tin (Sn) into industry’s most widely used substrate – silicon (100). The diffusion process of Sn into the silicon lattice is low cost, scalable and manufacturable. We have studied SiSn as a channel material using theoretical analysis, as well as, by MOSFET fabrication. We observe better switching performance and an order-of-magnitude reduction in Ioff of the SiSn pMOSFETs, while maintaining a similar Ion, compared to the Si devices. We also note that the Ion/Ioff ratio for pMOSFETs is improved with incorporation of Sn into the channel.


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