Page 05/01/2015 23:45:11

Jhonathan's paper in ACS Nano!

4/30/2015
This is a major milestone where highly scaled FinFET CMOS has been flexed using soft etch back and then it has been transferred on various asymmetric surfaces including fabric. A hard fought paper where many contributions have been integrated by the “integrator”: JPR.
 
Non-Planar Nano-Scale Fin Field Effect Transistors on Textile, Paper, Wood, Stone, and Vinyl via Soft Material-Enabled Double-Transfer Printing
Jhonathan P. Rojas,†,§ Galo A. Torres Sevilla,†,§ Nasir Alfaraj, Mohamed T. Ghoneim, Arwa T. Kutbee, Ashvitha Sridharan, Muhammad Mustafa Hussain*,†
Integrated Nanotechnology Lab, King Abdullah University of Science and Technology, Thuwal 23955-6900, Saudi Arabia
The KAUST Schools, King Abdullah University of Science and Technology, Thuwal 23955-6900, Saudi Arabia
§Authors contributed equally to this work
 
The ability to incorporate rigid but high-performance nano-scale non-planar complementary metal-oxide semiconductor (CMOS) electronics with curvilinear, irregular, or asymmetric shapes and surfaces is an arduous but timely challenge in enabling the production of wearable electronics with an in-situ information-processing ability in the digital world. Therefore, we are demonstrating a soft-material enabled double-transfer-based process to integrate flexible, silicon-based, nano-scale, non-planar, fin-shaped field effect transistors (FinFETs) and planar metal-oxide-semiconductor field effect transistors (MOSFETs) on various asymmetric surfaces to study their compatibility and enhanced applicability in various emerging fields. FinFET devices feature sub-20 nm dimensions and state-of-the-art, high-k/metal gate stacks, showing no performance alteration after the transfer process. A further analysis of the transferred MOSFET devices, featuring 1 mm gate length, exhibits an ION value of nearly 70 mA/mm (VDS = 2 V, VGS = 2 V) and a low sub-threshold swing of around 90 mV/dec, proving that a soft interfacial material can act both as a strong adhesion/interposing layer between devices and final substrate as well as a means to reduce strain, which ultimately helps maintain the device’s performance with insignificant deterioration even at a high bending state.
 
Great work Jhonathan et al. – keep it up!